The recent advances and trends in fan-out wafer/panel-level packaging (FOW/PLP) are presented in this study. Emphasis is placed on: (A) the package formations such as (a) chip first and die face-up, (b) chip first and die face-down, and (c) chip last or redistribution layer (RDL)-first; (B) the RDL fabrications such as (a) organic RDLs, (b) inorganic RDLs, (c) hybrid RDLs, and (d) laser direct imaging (LDI)/printed circuit board (PCB) Cu platting and etching RDLs; (C) warpage; (D) thermal performance; (E) the temporary wafer versus panel carriers; and (F) the reliability of packages on PCBs subjected to thermal cycling condition. Some opportunities for FOW/PLP will be presented.
Recent Advances and Trends in Fan-Out Wafer/Panel-Level Packaging
Contributed by the Electronic and Photonic Packaging Division of ASME for publication in the JOURNAL OF ELECTRONIC PACKAGING. Manuscript received October 19, 2018; final manuscript received March 14, 2019; published online May 17, 2019. Assoc. Editor: Kaushik Mysore.
Lau, J. H. (May 17, 2019). "Recent Advances and Trends in Fan-Out Wafer/Panel-Level Packaging." ASME. J. Electron. Packag. December 2019; 141(4): 040801. https://doi.org/10.1115/1.4043341
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