An elasto-plastic-creep analysis of a low-cost micro via-in-pad (VIP) substrate for supporting a solder bumped flip chip in a chip scale package (CSP) format which is soldered onto a printed circuit board (PCB) is presented in this study. Emphasis is placed on the design, materials, and reliability of the micro VIP substrate and of the micro VIP CSP solder joints on PCB. The solder is assumed to obey Norton’s creep law. Cross-sections of samples are examined for a better understanding of the solder bump, CSP substrate redistribution, micro VIP, and solder joint. Also, the thermal cycling test results of the micro VIP CSP PCB assembly is presented.

1.
Lau, J. H., 2000, Low Cost Flip Chip Technologies for DCA, WLCSP, and PBGA Assemblies, McGraw-Hill, New York, NY.
2.
Lau, J. H., and Lee, S. W. R., 2001, Microvias for Low Cost High Density Interconnects, McGraw-Hill, New York, NY.
3.
Tsukada, Y., and Tsuchida, S., 1992, “Surface Laminar Circuit, A Low Cost High Density Printed Circuit Board,” Proceedings of Surface Mount International, Aug., pp. 537–542.
4.
Tsukada, Y., Mashimoto, Y., Nishio, T., and Mii, N., 1992, “Reliability and Stress Analysis of Encapsulated Flip Chip Joint on Epoxy Base Printed Circuit Board,” Proceedings of ASME/JSME Joint Conference on Electronic Packaging, Sept., pp. 827–835.
5.
Lau, J. H., 1992, “Thermal Fatigue Life Prediction of Encapsulated Flip Chip Solder Joints for Surface Laminar Circuit Packaging,” ASME Paper No. 92W/EEP-34, ASME Winter Annual Meeting, Anaheim, CA, Nov.
6.
Lau
,
J. H.
,
Krulevitch
,
T.
,
Schar
,
W.
,
Heydinger
,
M.
,
Erasmus
,
S.
, and
Gleason
,
J.
,
1993
, “
Experimental and Analytical Studies of Encapsulated Flip Chip Solder Bumps on Surface Laminar Circuit Boards
,”
Circuit World
,
19
(
3
), pp.
18
24
.
7.
Tsukada, Y., Maeda, Y., and Yamanaka, K., 1993, “A Novel Solution for MCM-L Utilizing Surface Laminar Circuit and Flip Chip Attach Technology,” Proceedings of 2nd International Conference on Multichip Modules, Apr., pp. 252–259.
8.
Tsukada, Y., 1994, “Solder Bumped Flip Chip Attach on SLC Board and Multichip Module,” Chip on Board Technologies for Multichip Modules, J. H. Lau, ed., van Nostrand Reinhold, New York, NY, pp. 410–443.
9.
Gonzalez
,
C. G.
,
Wessel
,
R. A.
, and
Padlewski
,
S. A.
,
1999
, “
Epoxy-Based Aqueous Processable Photo dielectric Dry Film and Conductive ViaPlug for PCB Build-Up and IC Packaging
,”
IEEE Trans. Adv. Packag.
,
22
(
3
), pp.
385
390
.
10.
Noddin, D. B., Swenson, E., and Sun, Y., 1998, “Solid State UV-LASER Technology for the Manufacture of High Performance Organic Modules,” Proceedings of IEEE 48th Electronic Components and Technology Conference, Seattle, WA, June, pp. 822–827.
11.
Illyefalvi-Vitez, Z., Ruszinko, M., and Pinkola, J., 1998, “Recent Advancements in MCM-L Imaging and Via Generation by Laser Direct Writing,” Proceedings of 48th Electronic Components and Technology Conference, Seattle, WA, May, pp. 144–150.
12.
Lau
,
J. H.
, and
Chang
,
C.
,
2000
, “
Overview of Microvia Technologies
,”
Circuit World
,
26
(
2
), Jan., pp.
22
32
.
13.
Jimarez, M., Li, L., Tytran, C., Loveland, C., and Obrzut, J., 1998, “Technical Evaluation of a Near Chip Scale Size Flip Chip/Plastic Ball Grid Array Package,” Proceedings of IEEE 48th Electronic Components and Technology Conference, Seattle, WA, June, pp. 495–502.
14.
Mawer, A., Simmons, K., Burnette, T., and Oyler, B., 1998, “Assembly and Interconnect Reliability of BGA Assembled onto Blind Micro and Through-Hole Drilled Via in Pad,” Proceedings of Surface Mount International, Aug., pp. 21–28.
15.
Lau, J. H., and Lee, S. W. R., 1999, Chip Scale Package: Design, Materials, Process, Reliability, and Applications, McGraw-Hill, New York, NY.
16.
Lau
,
J. H.
,
Chang
,
C.
,
Lee
,
S. W. R.
,
Chen
,
T.
,
Cheng
,
D.
,
Tseng
,
T.
, and
Lin
,
D.
,
2000
, “
Design and Manufacturing of Micro Via-in-Pad Substrates for Solder Bumped Flip Chip Applications
,”
Journal of Electronic Manufacturing
,
10
(
1
), pp.
79
87
.
17.
Lau, J. H., and Pao, Y. H., 1997, Solder Joint Reliability of BGA, CSP, Flip Chip, and Fine Pitch SMT Assemblies, McGraw-Hill, New York, NY.
18.
Lau, J. H., 1995, Ball Gray Array Technology, McGraw-Hill, New York, NY.
19.
Darveaux, R., 2000, “Effects of Simulation Methodology on Solder Joint Crack Growth Correlation,” Proceedings of IEEE 50th Electronic Components and Technology Conference, Las Vegas, NE, pp. 1048–1058.
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