This research establishes a micro-macro 3D finite element model for no underfill flip chip BGA package. The no underfill package uses a ceramic-like (CTE close to silicon) material mounted on the backside of the flip chip substrate to constrain the thermal expansion of the organic substrate and enhance the reliability of the solder joint. This work attempts to design a constrained structure to enhance the reliability of the no underfill flip chip package. For the special design of constrained structure, a full-scale 3D finite element model is needed to investigate some mechanical behaviors that cannot be revealed by the 2D finite element model. However, to establish a full-scale 3D finite element model, the large computation time is an issue. The equivalent beam concept is adopted in this research to overcome this drawback of the finite element models. The results indicate that the equivalent beam concept is a feasible methodology for reducing the computation time of the 3D finite element model. Further, the new design structure could improve package reliability, increase manufacturing throughput and thermal performance, and maintain reworkability of the flip chip structure.
- Electronic and Photonic Packaging Division
A Full-Scale 3D Finite Element Analysis for No-Underfill Flip Chip Package
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Hsu, SM, Lin, JC, & Chiang, KN. "A Full-Scale 3D Finite Element Analysis for No-Underfill Flip Chip Package." Proceedings of the ASME 2002 International Mechanical Engineering Congress and Exposition. Electronic and Photonic Packaging, Electrical Systems Design and Photonics, and Nanotechnology. New Orleans, Louisiana, USA. November 17–22, 2002. pp. 311-318. ASME. https://doi.org/10.1115/IMECE2002-39674
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